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Bitwise operation inputs
Use decimal, hex, binary, or octal. Separators such as underscores, spaces, commas, and apostrophes are ignored.
Choose Auto for prefixed literals; force base 2, 8, 10, or 16 for bare values.
Choose logic, complement, shift, rotate, or a single-bit flag operation.
For mask checks, enter the mask exactly as it appears in your code or register note.
Use the same base as your mask source when the literal has no prefix.
{{ normalizedShiftCount }} bit{{ normalizedShiftCount === 1 ? '' : 's' }}
Use 0-255; rotations normalize the count to the active width.
bits
bit {{ normalizedBitIndex }}
Use this for set, clear, toggle, and test-bit operations.
LSB=0
Auto rounds to a byte boundary; fixed widths emulate common byte, word, dword, qword, and wide-register checks.
Choose Custom to keep manual values, or load a debugging case.
Enter 2-256 bits. Values outside the range are clamped.
bits
Nibble groups are good for bit work; byte groups match packet and register dumps.
Use MSB first for written binary and LSB first for little-endian memory notes.
On outputs explicit base prefixes; Off outputs grouped digits only.
{{ includePrefixEnabled ? 'On' : 'Off' }}
On matches many datasheets and packet dumps; Off keeps lowercase output.
{{ uppercaseHexEnabled ? 'On' : 'Off' }}
On shows signed interpretation beside the unsigned register value.
{{ showSignedEnabled ? 'On' : 'Off' }}
Format Value Copy
{{ row.label }} {{ row.value }}
Bit A {{ needsOperandB ? 'B/mask' : 'Operand' }} Result Transition Role Copy
{{ row.bit }} {{ row.a }} {{ row.b }} {{ row.r }} {{ row.transition }} {{ row.role }}
Check Finding Next use Copy
{{ row.check }} {{ row.finding }} {{ row.nextUse }}
Width Unsigned Hex Status Copy
{{ row.width }} {{ row.unsigned }} {{ row.hex }} {{ row.status }}
Field Value Copy
{{ row.label }} {{ row.value }}

        
Customize
Advanced
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Introduction:

Bitwise operations work on the individual zero and one positions inside an integer. They are used when a number is more than a count: a permission mask, packet field, device register, checksum step, packed option set, or compact group of flags. A single wrong bit can change the meaning of a whole value, so the useful question is not only the final number but which positions stayed set, cleared, moved, or wrapped.

Bitwise mask flow A compact diagram showing operand A, mask B, and the bitwise result inside an 8-bit register. Each bit position is evaluated inside the selected width Bit index Operand A Mask B Result 7654 3210 1 0 1 0 1 0 1 0 0 0 0 0 1 1 1 1 0 0 0 0 1 0 1 0 AND keeps only lanes where both bits are 1 The same lanes can be read as binary, hex, unsigned decimal, or signed two's-complement values.

Most bitwise work depends on a fixed register width. The same input pattern can behave differently at 8 bits, 16 bits, 32 bits, or a wider custom width because complement operations, overflows, rotations, and signed readings need a boundary. Within that boundary, bits are usually numbered from the least significant bit as bit 0, which matches common mask expressions such as 1 << 3.

Bitwise results are exact, but their interpretation is contextual. 0xF0 can be an unsigned 240, a signed -16 in an 8-bit two's-complement reading, a high-nibble mask, or a set of enabled flags. The number alone is not enough. Width, signedness, shift style, and mask intent must match the code, datasheet, packet format, or register note being checked.

How to Use This Tool:

Start with the integer or mask exactly as it appears in your code, log, protocol note, or register table. The calculator accepts decimal, binary, octal, and hexadecimal literals, then shows the result as fixed-width bit artifacts.

  1. Enter the first value in Operand A. Keep Input A base on Auto for prefixed literals such as 0b10101010, 0o377, or 0xFF. Force Binary, Octal, Decimal, or Hexadecimal when bare digits such as 1010 should not be treated as decimal.
  2. Choose Operation. AND, OR, XOR, NAND, NOR, and XNOR reveal Operand B / mask; shifts and rotations reveal Shift / rotate count; set, clear, toggle, and test reveal Bit index. NOT uses only Operand A.
  3. Set Register width before trusting width-sensitive work. Auto rounds to a byte boundary, fixed widths cover 8 through 256 bits, and Custom accepts a 2 to 256 bit window.
  4. Open Advanced for review settings. Digit grouping, Byte order preview, Include prefixes, Uppercase hex, and Signed readout change how the same register pattern is displayed and audited.
  5. Use the summary as the first sanity check. The large value is the hexadecimal result, the secondary line shows the expression and unsigned result, and the badges confirm operation, width, density, and changed-bit status.
  6. If a red warning appears, fix the literal before comparing results. Common causes are an empty operand, a digit that is invalid for the selected base, or a prefix such as 0x while a different base is forced.
  7. Review the result tab that matches your task: Multi-base Result for decimal, hex, binary, octal, set-bit count, and signed rows; Bit Impact Map for lane-by-lane changes; Operation Guidance for next-use cues; Width Audit for width comparisons; Bit Density Profile for a visual count; and Input Snapshot or JSON when settings need to travel with the result.

Interpreting Results:

The safest result to trust first is the fixed-width pattern, not a single decimal reading. Check Hexadecimal and Binary beside Active width, then decide whether the unsigned or signed reading matches the system you are modeling.

Bitwise result interpretation guide
Output cue What it means Verification step
Changed from A Counts bit positions where the result differs from Operand A. Open Bit Impact Map to see exactly which bit numbers changed.
Set bits and density badge Shows how many one bits remain inside the active width. Use it for flag coverage or sparse masks, not as proof that a flag name is correct.
Decimal signed two's complement Reads the same result pattern as a signed integer using the selected width. Confirm the sign bit and width match the language, CPU type, or data field being checked.
Width Audit Recomputes the same operation at common widths so complement, shift, and wrap effects are visible. Compare the active row with the width used by the source system before copying a mask.
Test bit status Reports whether the selected bit position is set or clear. Treat a non-zero result as a bit check only; it does not prove what the application-level flag means.

A clean-looking result can still be wrong if the width is wrong. NOT, NAND, NOR, XNOR, arithmetic right shift, logical right shift, and rotations all depend on the active register boundary. When a value comes from real code, keep the language's integer size and signedness rules beside the calculator result.

Technical Details:

Bitwise logic evaluates aligned bit positions. AND keeps a one only where both inputs have one. OR keeps a one where either input has one. XOR keeps a one where the inputs differ. Complemented forms apply the same lane rule first, then invert the result inside the active width.

A fixed-width register turns an unlimited mathematical integer into a stored pattern. The width creates a mask with all selected bits set, then every operation is reduced to that mask. This is why complement and left shift do not grow forever: bits outside the selected register are discarded, and negative inputs are first wrapped into the same unsigned register space.

Formula Core

With register width N, mathematical input V, stored unsigned value U, and all-ones mask M, the fixed-width core is:

M = 2N-1 U = (Vmod2N+2N)mod2N NOT(A) = ¬AM Signed(U) = { U if U<2N-1 U-2N if U2N-1

For an 8-bit example, 0x0F has stored value 15 and mask 255. NOT flips the eight lanes, so the result is 0xF0. The unsigned reading is 240, while the signed two's-complement reading is 240 - 256 = -16 because the sign bit is set.

Bitwise operation rule summary
Operation family Rule inside width Common use
AND, OR, XOR Combine each matching bit lane from A and B. Extract masks, set flags, compare differences, and build fingerprints.
NAND, NOR, XNOR, NOT Invert the lane result, then clip it with the active-width mask. Find clear lanes, equality masks, unavailable bits, or byte-size complements.
Left shift Move bits toward more significant positions, fill low positions with zero, and discard overflow. Scale unsigned bit patterns, build masks, or align packed fields.
Arithmetic right shift Read A as signed, shift right, preserve the sign, and wrap back to the register. Match signed integer behavior where right shift keeps negative values negative.
Logical right shift Shift right and fill high positions with zero. Match unsigned fields, packet values, and languages with a zero-fill right shift.
Rotate left or right Move bits around the register boundary instead of discarding them. Inspect circular shifts used in checksums, hashes, ciphers, and register operations.
Set, clear, toggle, test bit Build a one-bit mask from the selected bit index, where bit 0 is the least significant bit. Model flag updates and single-bit condition checks.

Validation and display rules affect repeatability. Separators such as spaces, underscores, commas, and apostrophes are ignored in numeric literals. Prefixes choose the base only when the input base is Auto. Forced bases make ambiguous bare strings predictable, but a mismatched prefix is rejected so a hex-looking value is not silently parsed as binary or decimal.

Bitwise calculator bounds and display rules
Setting or limit Rule Why it matters
Accepted bases Binary, octal, decimal, and hexadecimal, with optional sign and visual separators. Lets code-style literals and register notes be checked without manual cleanup.
Auto width Uses enough bits for the entered values and selected operation, rounded to a byte boundary, up to 256 bits. Keeps ordinary results readable while still exposing fixed-width behavior.
Custom width Clamped to 2 through 256 bits. Prevents huge maps while still covering byte, word, block, and wide-register checks.
Shift and rotate count Accepted from 0 through 255; rotations use the count modulo the active width. A 20-bit rotate in an 8-bit register behaves like a 4-bit rotate.
Bit index Accepted from 0 through 255 and clamped inside the active width. Single-bit operations cannot address outside the selected register.
Digit grouping and byte order preview Change display grouping and byte-oriented review only. They help match notes, dumps, and datasheets without changing the integer result.

Privacy Notes:

The calculation is produced in the browser. No separate server calculation is needed for operands, masks, bit indices, shifts, or result tables.

  • Values may appear in the page address when settings are reflected there, so avoid sharing configured links that contain private masks, register dumps, or proprietary test values.
  • Copied rows and downloaded CSV, DOCX, chart, or JSON artifacts can include operands, settings, and results. Review them before attaching to tickets or public posts.
  • This calculator is useful for inspecting bit patterns, but it is not a security analysis of a protocol, cipher, permission model, or production device state.

Worked Examples:

Mask the low nibble

Enter 0b10101010 as Operand A, choose A AND B (&), and enter 0x0F as Operand B / mask with an 8-bit width. Hexadecimal becomes 0x0A, Binary becomes 0b0000 1010 when nibble grouping is on, and Changed from A reports 2 of 8. The Bit Impact Map shows that the high-nibble one bits were cleared while the low-nibble lanes were preserved.

Rotate a 16-bit word

Enter 0x1234, choose Rotate A left (ROL), set Shift / rotate count to 4, and use a 16-bit width. Hexadecimal becomes 0x2341. The result differs from a left shift because the high nibble wraps back into the low nibble instead of being discarded.

Compare arithmetic and logical right shift

Enter 0xF0000000 with a 32-bit width and shift by 4. With A logical right shift (>>>), Hexadecimal becomes 0x0F000000 because zeroes enter from the left. With A arithmetic right shift (>>), the signed high bit is preserved and the result reads as 0xFF000000. Check Decimal signed two's complement before deciding which behavior matches your language or CPU note.

Fix a base mismatch warning

If Operand A is 0xFF and Input A base is forced to Binary, the warning says the prefix does not match the selected base. Switch Input A base to Auto or Hexadecimal, then confirm Decimal unsigned reports 255 at an 8-bit width. If the intended binary value was the bare digits 11111111, remove the hex prefix and keep Binary selected.

FAQ:

Why does NOT depend on register width?

NOT flips every lane inside the selected register. At 8 bits, ~0x0F becomes 0xF0; at 16 bits, it becomes 0xFFF0. Check the width badge before copying complemented results.

What is the difference between arithmetic and logical right shift?

Arithmetic right shift preserves the sign bit after reading Operand A as signed. Logical right shift fills high positions with zero. They match for many non-negative patterns but diverge when the sign bit is set.

Can I paste values with spaces or underscores?

Yes. Spaces, underscores, commas, and apostrophes are ignored inside numeric literals, so grouped values such as 0b1010_1100 or 1,024 can be entered directly.

Why does a bare value like 1010 look wrong?

With Auto base, a bare 1010 is decimal unless you force Binary. Use Input A base or Input B base when the text has no 0b, 0o, or 0x prefix.

Does a test-bit result prove a permission is enabled?

It proves only that the selected bit position is set in the chosen register width. The application, protocol, or device documentation still decides which named permission or flag that bit represents.

Glossary:

Operand
The integer value being used by a bitwise operation, shown as Operand A and, for binary operations, Operand B.
Mask
A bit pattern used to keep, set, clear, toggle, or test selected lanes.
Register width
The number of bit positions available for the stored pattern, such as 8, 16, 32, 64, 128, or 256 bits.
Two's complement
The common signed-integer reading where the top bit carries negative weight when it is set.
Sign bit
The most significant bit when the register is interpreted as a signed two's-complement value.
Logical right shift
A right shift that fills newly opened high positions with zero.
Arithmetic right shift
A right shift that fills newly opened high positions with copies of the sign bit.
Rotate
A circular shift where bits leaving one end of the register re-enter at the other end.

References: