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Spaces, underscores, commas, and apostrophes are ignored inside the literal.
Auto resolves a prefix; an unprefixed literal resolves to decimal.
Choose logic, complement, shift, rotate, or a single-bit flag operation.
Enter the second value or mask exactly as it appears in code or a register note.
Auto resolves a prefix; an unprefixed literal resolves to decimal.
{{ shift_count }} bits
Shifts discard lanes beyond the width; rotations wrap them and reduce the count modulo width.
LSB = 0
Indices from 0–255 are accepted and clamp inside the active register width.
Auto selects a byte boundary; fixed widths emulate common register sizes.
Values clamp to 2–256 bits.
bits
Changes display grouping only.
Changes only the byte-stream row.
Adds 0b, 0o, and 0x to display and copied values.
{{ includePrefixes ? 'On' : 'Off' }}
Changes hexadecimal letter casing only.
{{ uppercaseHex ? 'On' : 'Off' }}
Adds the two's-complement interpretation without changing the register.
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FormatValueMeaningCopy
{{ row.label }}{{ row.value }}{{ row.note }}
BitAB / maskResultEffectCopy
{{ row.bit }}{{ row.a }}{{ row.b }}{{ row.result }}{{ row.effect }}
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Bitwise operations treat an integer as a row of individual binary positions. Each position can represent a hardware state, permission, protocol flag, color channel, compact option, or one part of a larger mask. Changing one bit can therefore alter one independent property without rewriting the others.

Register width is part of the meaning. The value 255 occupies eight set bits in an 8-bit register, but it leaves higher bits clear in a 16-bit register. Complement, shifts, rotations, and signed interpretation all change when the width changes because the operation has a different boundary.

Mask
A bit pattern used to keep, set, clear, toggle, or test selected positions.
Most significant bit
The highest position in the chosen width. In two's-complement signed interpretation, it acts as the sign bit.
Rotation
A shift whose outgoing bits wrap around to the opposite end instead of being discarded.

Binary, octal, decimal, and hexadecimal are different written forms of the same integer. Byte-order display is another view of the same fixed-width pattern; reversing the preview order does not change the computed register value.

Most mistakes come from an unstated width, a mismatched literal base, or confusing an arithmetic right shift with a logical one. Record those choices alongside a result whenever it will be compared with source code, a register manual, or a packet field.

How to Use This Tool:

Choose the register semantics before comparing the result with another language or device.

  1. Enter Operand A and choose its base. Auto recognizes 0b, 0o, and 0x; an unprefixed Auto value is decimal.
  2. Select the Operation. Logic operations request Operand B, shifts and rotations request a count, and flag operations request a bit index.
  3. For binary logic, enter Operand B / mask with its own base. A prefix that conflicts with a manually selected base is rejected.
  4. Choose a fixed Register width, a custom width from 2 through 256 bits, or Auto. Fixed-width work should match the real register or field definition.
  5. Use grouping, prefix, hex-case, signed-readout, and byte-order choices to match the notation you need. These choices do not alter the underlying bit pattern.
  6. Check the hexadecimal result, unsigned value, expression, and changed-lane count. If the result is withheld, correct the first literal, base, count, width, or index message.

Interpreting Results:

The binary, octal, hexadecimal, unsigned decimal, and optional signed decimal rows describe one fixed-width result. A negative signed reading does not mean the stored bits changed; it means the top bit is being interpreted as a two's-complement sign bit.

  • Changed bits counts positions that differ between Operand A and the result.
  • Set bits counts ones in the result; it is not a count of changed positions.
  • Byte stream follows the selected display order only. Compare byte order with the external format before copying it into a packet or memory dump.
  • Test bit returns either zero or the selected bit mask, not a normalized Boolean value of one.

Technical Details:

Every operand is parsed as an arbitrary-size integer, then wrapped into the active width. The width mask is a row of w one-bits, so wrapping is equivalent to retaining only the lowest w positions.

Transformation Core:

StageRule
Clean literalSpaces, underscores, commas, and apostrophes are ignored. An optional leading sign is retained.
Resolve baseAuto uses a binary, octal, or hex prefix; otherwise it uses decimal. A selected base accepts only its valid digits.
Resolve widthFixed and custom widths are direct. Auto finds the required signed or unsigned bit length, expands for Operand B, bit index, or left shift, then rounds up to a byte boundary with a 256-bit maximum.
Wrap operandsEach operand is ANDed with (1 << width) - 1, retaining only the active lanes.
ExecuteThe chosen logic, shift, rotation, or flag rule runs inside that fixed width.
FormatThe same result is padded and displayed in several bases, with optional grouping, prefixes, case, signed meaning, and byte-order preview.

For negative operands, wrapping produces the low w bits of the two's-complement representation. Signed output subtracts 2^width when the top bit is set.

Rule Core:

OperationFixed-width rule
ANDA & B keeps positions set in both operands.
AND NOTA & (~B & mask) clears positions selected by B.
OR / XORA | B sets positions present in either operand; A ^ B sets positions that differ.
NAND / NOR / XNORThe corresponding AND, OR, or XOR result is complemented and masked back to the width.
NOT~A & mask flips every active position.
Left shiftMoves bits left and discards positions beyond the width.
Logical right shiftMoves the unsigned pattern right and fills high positions with zero.
Arithmetic right shiftInterprets A as signed and extends the sign bit before wrapping.
Rotate left / rightWraps outgoing positions; the count is reduced modulo width.
Set / clear / toggleOR, AND NOT, or XOR with 1 << index.
TestANDs A with 1 << index, returning the mask value when set.

Shift counts and bit indices accept whole numbers from 0 through 255. A bit index above the active register is clamped to the highest lane. Custom width accepts 2 through 256 bits. Rotations use the count modulo width; ordinary shifts do not wrap discarded bits.

Worked Examples:

Keep the low nibble

With an 8-bit width, 0b10101010 AND 0x0F produces 0x0A, or 0b00001010. The upper four positions are cleared because the mask has zeros there.

Right-shift a negative 8-bit value

The pattern 0xF0 reads as unsigned 240 or signed −16. Shifting right by two gives 0x3C with logical shift and 0xFC with arithmetic shift because the arithmetic form extends the sign bit.

References: