Microstrip Impedance Calculator

Solve direction:

Choose the stackup question you need to answer.

Equation model:

The selected model owns the headline result and inverse-width solve.

Substrate starting point:

A preset changes the Dk field; the numeric Dk remains the calculation input.

Dielectric constant:

Use 1–20; editing this value switches the preset to Custom.

Dielectric height:

Changing the unit converts the displayed value and preserves the same physical height.

Finished trace width:

Changing the unit converts the displayed value and preserves the same physical width.

Target impedance:

{{ formatNumber(target_z0, 1) }} Ω

Use 5–200 Ω; common single-ended planning targets include 50 Ω and 75 Ω.

Finished copper thickness:

Changing the unit converts the displayed value; 1 oz is treated as nominal 34.8 µm copper.

Width tolerance:

{{ formatNumber(tolerance_percent, 0) }}%

Use 0–30%; ask the fabricator for a realistic finished-width tolerance.

Route length:

Changing the unit converts the displayed value and preserves the same physical route.

Reference frequency:

Changing the unit converts the displayed value and preserves the same frequency.

Display precision:

Choose two, three, or four decimal places without changing the model.

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Review	Current read	Next action	Copy
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How does impedance move as finished width changes around this geometry?

A PCB trace can be perfectly connected at direct current and still distort a fast edge. Once a route is long enough relative to the signal rise time, the trace and its return plane behave as a transmission line. A mismatch between that line's characteristic impedance and the driver, load, or termination sends part of the wave back toward its source.

Microstrip is the outer-layer form of that transmission line. The copper trace sits above a reference plane, with laminate below the trace and air above it. Its electric field occupies both materials, so propagation depends on an effective permittivity that falls between air and the laminate's dielectric constant.

Microstrip cross section with trace width, dielectric height, dielectric constant, and reference plane labels.

The width W, dielectric height H, finished copper thickness T, and dielectric constant Dk define the first-order cross section. A wider trace usually lowers impedance; a larger plane spacing raises it; and a higher dielectric constant lowers impedance while slowing the wave. Finished dimensions matter because etching and plating can move the manufactured trace away from its CAD width.

Practical sources of microstrip impedance variation
Variation	Why the result changes	What to verify
Laminate Dk	Resin content, glass weave, frequency, and test method affect the value used by the model.	Use the fabricator's stackup value for the intended material and frequency.
Etched width	Narrower copper generally raises impedance; wider copper lowers it.	Ask for finished width and tolerance, not only nominal artwork width.
Plane spacing	Prepreg and core thickness set the field coupling to the return plane.	Use the actual trace-to-plane dielectric height.
Surface treatment	Solder mask and nearby copper can shift the real field distribution.	Confirm whether the board-house model includes them.

Closed-form equations are valuable for early routing and sensitivity checks, but they do not replace a field solver or fabrication data. Tight controlled-impedance work should end with the board house's stackup model and, when required, time-domain reflectometry on a representative coupon.

How to Use This Tool:

Use finished stackup dimensions whenever they are available, then decide whether you are checking a width or solving one.

Choose Known width → impedance for an existing route or Target impedance → width for a new single-ended target.
Select IPC-2141 or Hammerstad-Jensen. The selected model controls the headline impedance and inverse-width solution; the other model remains a comparison at the same width.
Enter the laminate Dielectric constant, trace-to-plane Dielectric height, and Finished copper thickness. A substrate preset only supplies a starting Dk value.
Enter Finished trace width or the Target impedance. Changing a length unit converts the displayed number while preserving the same physical dimension.
Add a realistic Width tolerance to see the fabrication window. Use Route length and Reference frequency only when propagation delay or electrical length matters.
Compare the selected-model result, the two-model spread, and the tolerance range before releasing the geometry. An unsolved target or out-of-domain message means the stackup needs different dimensions or a different verification method.

Interpreting Results:

The nominal impedance is an estimate for one uniform cross section. A result within 2 Ω of the target is labeled close; more than 2 Ω and up to 5 Ω calls for review; more than 5 Ω calls for an adjustment. These are planning cues, not manufacturing acceptance limits.

A selected-width tolerance that produces no more than a 2 Ω impedance spread is labeled stable; more than 2 Ω and up to 5 Ω is moderate; more than 5 Ω is sensitive.
A width-to-height ratio from 0.1 through 3 is marked as a common planning range. Outside it, the equation may still return a value, but confidence should decrease.
A copper-thickness-to-height ratio above 0.25 receives a high-ratio caution because finite-thickness effects become harder to ignore.
A difference between IPC-2141 and Hammerstad-Jensen is model uncertainty, not a tolerance band. Use the fabricator's model for the actual stackup.

Technical Details:

Characteristic impedance is the voltage-to-current ratio of a traveling wave on a uniform transmission line. The closed-form estimates here are quasi-static: geometry and dielectric constant set impedance, while entered route length and frequency are used only for derived delay and electrical length.

Formula Core:

The IPC-2141 surface-microstrip estimate includes finite copper thickness directly. All three dimensions must use the same unit.

Z_{0} = \frac{87}{\sqrt{ε_{r} + 1.41}} ln (\frac{5.98 H}{0.8 W + T})

The logarithm's argument must exceed 1 and the resulting impedance must be positive. The companion IPC effective-permittivity estimate is:

ε_{eff} = \frac{ε_{r} + 1}{2} + \frac{ε_{r} - 1}{2 \sqrt{1 + \frac{12 H}{W}}}

Hammerstad-Jensen uses the normalized width u = W/H. In this calculation it is the zero-thickness reference, so changing copper thickness does not change the Hammerstad result.

\begin{aligned} a & = 1 + \frac{ln (\frac{u^{4} + {u / 52}^{2}}{u^{4} + 0.432})}{49} + \frac{ln (1 + {u / 18.1}^{3})}{18.7} \\ b & = 0.564 {(\frac{ε_{r} - 0.9}{ε_{r} + 3})}^{0.053} \\ ε_{eff} & = \frac{ε_{r} + 1}{2} + \frac{ε_{r} - 1}{2} {(1 + \frac{10}{u})}^{- a b} \end{aligned}

With F = 6 + (2π − 6)e^{−(30.666/u)^0.7528}, the impedance estimate is:

Z_{0} = \frac{60}{\sqrt{ε_{eff}}} ln (\frac{F}{u} + \sqrt{1 + {\frac{2}{u}}^{2}})

Inverse solve and derived quantities:

Target-width mode repeatedly narrows a positive width interval until the selected model reaches the requested 5 Ω to 200 Ω target. The width sensitivity calculation then evaluates both models around the nominal width and tests the selected model at the entered tolerance limits.

Derived microstrip quantities
Quantity	Relationship	Unit
Velocity factor	1 / √ε_eff	ratio
Signal velocity	c / √ε_eff	m/s
Delay	√ε_eff / c	ps/mm
Electrical length	frequency × route delay × 360°	degrees
Capacitance per length	1 / (Z₀ × signal velocity)	pF/in
Inductance per length	Z₀ / signal velocity	nH/in

Length inputs are normalized to millimeters, frequency to hertz, and 1 oz copper to a nominal 34.8 µm. Display precision changes only formatted output. The accepted model inputs include Dk from 1 through 20, dielectric height and finished width from 0.001 mm through 100 mm, copper thickness from 0 through 5 mm, and width tolerance from 0% through 30%.

Accuracy Notes:

Both equations assume an isolated, uniform surface microstrip over a solid reference plane. They do not model solder mask, copper roughness, trapezoidal etch shape, glass weave, nearby copper, discontinuities, losses, connectors, vias, or frequency-dependent material properties.

Material presets are planning values. Replace them with the dielectric value agreed with the fabricator.
The tolerance window varies width only; it is not a combined statistical tolerance for Dk, height, copper, and etch.
The entered reference frequency does not alter the impedance equations because Dk is held constant.
Use a field solver and fabricator-controlled coupon when the model spread, geometry warning, or impedance tolerance is consequential.

Worked Examples:

A common outer-layer starting point

For Dk 4.3, 0.18 mm dielectric height, 0.30 mm finished width, and 35 µm copper, IPC-2141 estimates 49.68 Ω while Hammerstad-Jensen estimates 54.83 Ω. The 5.15 Ω difference is large enough to confirm the stackup and preferred model with the fabricator before treating the 0.30 mm width as a controlled-impedance release value.

References:

IPC-2141A Design Guide for High-Speed Controlled Impedance Circuit Boards, IPC, March 2004.
IPC-TM-650 Method 2.5.5.7A, Characteristic Impedance of Lines on Printed Boards by TDR, IPC, March 2004.
Accurate Models for Microstrip Computer-Aided Design, E. Hammerstad and Ø. Jensen, IEEE MTT-S, 1980.