Voltage Divider Calculator

Calculation goal:

Choose the fastest path for your current bench question.

Analyze R1/R2 Solve R1 Solve R2

Input voltage:

Set the voltage across the full divider.

Target output voltage:

Enter the desired loaded output at the divider node.

R1 top resistor:

Top resistor value in the selected unit.

R2 bottom resistor:

Bottom resistor value in the selected unit.

Load model:

Model the input resistance of the circuit connected to Vout.

Custom load resistance:

Use the minimum expected input resistance for conservative sag estimates.

Build values:

Preferred series rounding applies to the divider resistors, not the load model.

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Display precision:

Set the number of decimal places used in labels, tables, and JSON strings.

Target tolerance:

Acceptable loaded-output error around the target voltage.

Resistor tolerance:

Use the tolerance printed on the actual divider resistors.

Power derating:

50% means choose a resistor rated at least twice the modeled dissipation.

Chart density:

Higher density gives a smoother output curve without changing the selected result.

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A voltage divider uses two resistors in series to make a smaller voltage from a larger one. The output node sits between the top resistor, R1, and the bottom resistor, R2, so the output is a fixed fraction of the input as long as nothing connected to that node draws meaningful current.

That last condition is where many divider mistakes happen. A meter, analog-to-digital converter, op-amp input, sensor module, or bias input is not always invisible to the circuit. Its input resistance sits from Vout to ground, in parallel with R2. When that load resistance is low enough, the lower leg becomes smaller than expected and the output voltage sags.

Loaded voltage divider with R1 above Vout, R2 below Vout, and the load resistance in parallel with R2.

Voltage dividers are useful for sensor scaling, battery measurement, bias references, test fixtures, and educational circuit checks. They are poor substitutes for regulators or buffers when the output must drive changing current, hold accuracy across temperature, or feed a fast sampling input.

A good divider choice balances three pressures: the output ratio, the load resistance, and the wasted current through the resistors. Raising both resistor values saves power but makes the output easier to disturb. Lowering them improves stiffness but increases current draw and heat.

How to Use This Tool:

Start with the circuit question you need answered: analyze a known pair, solve the top resistor, or solve the bottom resistor from a target output.

Choose Calculation goal. Analyze R1/R2 keeps both resistor fields visible, while Solve R1 or Solve R2 solves the missing divider resistor from Target output voltage.
Enter Input voltage and Target output voltage. The target must be greater than zero and lower than the input because a passive divider cannot raise voltage.
Enter the known resistor values using ohm, kohm, or Mohm units. R1 is the top resistor from the input rail to Vout; R2 is the bottom resistor from Vout to ground.
Select Load model. Use No external load for the ideal divider, or pick the 10 Mohm meter, 1 Mohm ADC/op-amp input, 100 kohm module input, or a positive custom load resistance.
Set Build values. Exact calculated / entered values keeps the math value, while E96, E24, and E12 round R1 and R2 to the nearest preferred resistor values.
Open Advanced when target tolerance, resistor tolerance, power derating, display precision, or chart density matters. These controls change fit badges, tolerance windows, reported precision, and the output curve sampling.
Read the headline output first, then check Divider Snapshot, Load & Power Audit, and Output Transfer Curve before moving the values into a schematic or parts list.

If an input issue appears, fix the named value before using the results. The most important recovery case is Solve R2 with a heavy load: when the load is too low to reach the target with any positive R2, raise the load impedance, lower R1, or use a buffer.

Interpreting Results:

The headline output is the loaded output voltage when a load is selected, or the ideal no-load voltage when no external load is modeled. Treat the target badge, load sag, and power audit as part of the result, not as secondary decoration.

How to read voltage divider result fields
Output	What it tells you	What to verify
Output voltage	The modeled Vout after load resistance and selected resistor values are applied.	Compare it with Target fit, especially after E-series rounding.
No-load reference	The ideal divider output before the external load pulls on the node.	Large load sag means a meter reading, ADC input, or module input can change the value you expected.
Target fit	The voltage and percent error against the target. Within tolerance is inside the selected target window; near target is within twice that window.	Set Target tolerance to the real circuit requirement before treating the badge as acceptable.
Thevenin output resistance	The output node behaves like the no-load voltage through R1 parallel R2.	Lower is stiffer, but it costs more divider current and more resistor power.
Load ratio	Load resistance divided by Thevenin output resistance. At 100x or higher, sag is usually small; from 10x to 100x it is noticeable; below 10x it is heavy loading.	A good target fit with a low load ratio can still be fragile if the connected input varies.
Tolerance window	Worst-case output estimate from opposite resistor tolerance directions.	Use the tolerance printed on the actual resistors, not the value family alone.
Recommended rating	Minimum resistor wattage after the selected power derating is applied to the hottest divider resistor.	Round up to a real resistor wattage class and check voltage rating, ambient temperature, and enclosure heat.

Do not treat a neat output voltage as proof that the divider is ready to build. Check the loaded result, the no-load reference, load ratio, tolerance window, and recommended rating together, then verify a real circuit with the actual input device attached.

Technical Details:

In a two-resistor divider, the same current flows through R1 and R2 only when the output is unloaded. The output voltage is the share of the input voltage that appears across the lower resistance. Connecting a load from Vout to ground creates a parallel path beside R2, so the effective lower resistance falls and the output falls with it.

The Thevenin view explains why this matters. Looking back into the divider from the output node, the ideal no-load voltage is driven through R1 parallel R2. A load much larger than that resistance disturbs the node only a little. A load near that resistance becomes part of the divider and must be included in the voltage calculation.

Formula Core:

The loaded divider is calculated by replacing R2 with the effective lower resistance created by R2 in parallel with the load.

\begin{array}{rcl} R_{low} & = & R_{2}, when no external load is modeled \\ R_{low} & = & \frac{R_{2} R_{load}}{R_{2} + R_{load}}, when a load is connected \\ V_{out} & = & V_{in} \frac{R_{low}}{R_{1} + R_{low}} \\ R_{th} & = & \frac{R_{1} R_{2}}{R_{1} + R_{2}} \\ I_{source} & = & \frac{V_{in} - V_{out}}{R_{1}} \\ P & = & I^{2} R or \frac{V^{2}}{R} \end{array}

To solve a target, the equations are rearranged around the desired loaded output. Solving R1 is direct once the effective lower resistance is known. Solving R2 with a load has one extra boundary: the required lower resistance must be smaller than the load resistance, or no positive R2 can make the target.

\begin{array}{rcl} R_{1} & = & R_{low} (\frac{V_{in}}{V_{target}} - 1) \\ R_{low,needed} & = & \frac{R_{1} V_{target}}{V_{in} - V_{target}} \\ R_{2} & = & R_{low,needed}, without a load \\ R_{2} & = & \frac{R_{low,needed} R_{load}}{R_{load} - R_{low,needed}}, when R_{load} > R_{low,needed} \end{array}

Voltage divider symbols and result meanings
Symbol or field	Meaning	Notes
R1	Top resistor from input voltage to Vout.	Increasing R1 lowers Vout when other values stay fixed.
R2	Bottom resistor from Vout to ground.	Increasing R2 raises Vout in the unloaded divider.
R_load	Input resistance of the circuit connected to Vout.	It is modeled in parallel with R2, not in series with the divider.
R_th	Thevenin output resistance, equal to R1 parallel R2.	Used to judge how strongly a connected load will pull on the node.
Load sag	No-load output minus loaded output.	Zero only when no external load is modeled.
E12, E24, E96	Preferred resistor value families.	The selected family rounds divider resistors, while the load model stays as entered or preset.

The preferred-value options use standard E-series decades, so a solved 26.10 kohm resistor can become 26.1 kohm in E96 or 27 kohm in E24. That rounding can move the target error even though the original equation was exact. Display precision only changes labels, tables, and copied values; the arithmetic keeps more precision internally.

The output curve varies R2 around the selected value on a logarithmic sweep. It is most useful for seeing whether a nearby stocked R2 value changes the loaded output gently or sharply, and whether the loaded and unloaded curves separate enough to make the load choice important.

Accuracy Notes:

This is a DC or low-frequency resistor model. It is suitable for first-pass divider sizing and bench checks, but it does not prove that a physical circuit is safe, stable, or accurate in every environment.

Resistor tolerance is estimated as a worst-case opposite-direction pair. It does not include temperature coefficient, aging, leakage, or board contamination.
Power checks use modeled resistor dissipation and the selected derating fraction. Real parts also need body size, ambient temperature, enclosure, voltage rating, and safety spacing review.
Fast ADC inputs can need much lower source impedance than a slow DC calculation suggests because sampling capacitance and acquisition time affect settling.
Switching regulator feedback dividers, high-voltage sensing, and noisy boards need layout and datasheet checks. A high-impedance feedback node can pick up noise even when the simple voltage ratio is correct.

Worked Examples:

A 12 V rail feeding a 3.3 V ADC input can use Solve R1 with R2 at 10 kohm, a 1 Mohm load model, and E96 build values. The exact R1 is about 26.103 kohm, so E96 selects 26.1 kohm. Output voltage is about 3.300 V, Target fit is roughly +0.0002 V or +0.007%, and Load sag is about 0.024 V. The high load ratio makes this a reasonable first pass for a slow, high-impedance input.

A 5 V signal scaled near 2.5 V with R1 at 4.7 kohm, a 10 kohm custom load, and E24 build values is a more fragile case. Solve R2 gives an exact value near 8.868 kohm, and E24 selects 9.1 kohm. Output voltage lands near 2.517 V, so Target fit may look acceptable, but Load ratio is only about 3.23x load/Rth and Load sag is about 0.780 V from the no-load reference. That is a sign to consider lower divider values, a buffer, or a different input stage.

A common troubleshooting case appears when Solve R2 asks for more lower-leg resistance than the load can provide. With 5 V input, 2.5 V target, R1 at 10 kohm, and a 10 kohm load, the required effective lower resistance equals the load resistance, so no positive R2 can reach the target. Lowering R1, raising the load resistance, or buffering Vout gives the calculation room to solve.

FAQ:

Which resistor is R1?

R1 is the top resistor between the input voltage and the output node. R2 is the bottom resistor between the output node and ground. Swapping them changes the output ratio.

Why does adding a load lower the output?

The load is modeled from Vout to ground, so it sits in parallel with R2. That lowers the effective bottom resistance and pulls the output voltage below the no-load reference.

Why can Solve R2 fail with a heavy load?

A positive R2 can only make the effective lower resistance smaller than the load resistance. If the target needs an effective lower resistance equal to or greater than the load, the calculation stops and asks for a higher load impedance, lower R1, or a buffer.

Should I choose exact values or an E-series option?

Use exact values to study the math or when you already have precision values. Use E96, E24, or E12 to see what nearby stocked resistor values do to Target fit, load sag, current, and power.

Does this model handle high-frequency signals?

It models resistive DC or low-frequency behavior. It does not include resistor capacitance or inductance, PCB parasitics, ADC sampling capacitance, cable effects, or frequency-dependent input impedance.

Is the calculation submitted anywhere?

The entered values are calculated in the browser. No resistor values, target voltages, or load settings are submitted for calculation.

Glossary:

R1: Top divider resistor from the input voltage to Vout.
R2: Bottom divider resistor from Vout to ground.
Load resistance: The input resistance of the circuit connected to Vout, modeled in parallel with R2.
Thevenin output resistance: The resistance seen looking back into the divider output, equal to R1 parallel R2.
Load sag: The voltage drop from the ideal no-load output to the loaded output.
E-series: Standard preferred resistor value families such as E12, E24, and E96.
Power derating: A safety margin that asks the selected resistor rating to exceed the modeled heat dissipation.

References:

IEC 60063:2015 Preferred number series for resistors and capacitors, International Electrotechnical Commission, 2015-03-27.
Voltage Divider Circuits, All About Circuits.
Analysis of ADC System Distortion Caused by Source Resistance, Analog Devices, 2003-03-25.
Voltage Dividers in Power Supplies, Analog Devices, 2018-08-01.
Power Rating, Resistor Guide by EEPower.