Voltage Divider Calculator

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Calculation goal:

The selected path updates automatically; no submit action is needed.

Analyze R1/R2 Solve R1 Solve R2

Input voltage:

Changing the unit preserves the same voltage.

Target output:

Analyze mode uses this as the comparison target; solve modes use it in the resistor equation.

R1 top resistor:

Changing the unit preserves the same resistance.

R2 bottom resistor:

Changing the unit preserves the same resistance.

Connected load:

Use the minimum expected input resistance for a conservative loading check.

Custom load resistance:

Changing the unit preserves the same load resistance.

Build values:

Preferred-value selection applies to R1 and R2, not to the connected load.

Resistor tolerance:

The neutral default is 0%; it leaves the nominal output unchanged.

Maximum rating utilization:

100% is neutral. Choose 50% to require a nominal rating at least twice the modeled dissipation.

Divider snapshot

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Calculation method:

The external load is parallel with R2 before the divider ratio is applied.

Vout = Vin × (R2 || Rload) ÷ (R1 + (R2 || Rload))

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The chart renderer is unavailable. The same voltages remain available in the design and ledger artifacts.

A passive divider can scale a supply or signal with only two resistors, which makes it useful for sensing, bias, references, and feedback. Its apparent simplicity causes a common design mistake: calculating the resistor ratio as if nothing were connected to the output node.

R1 connects the input voltage to the output, and R2 connects the output to ground. With no load, their ratio sets the output. Once a meter, analog-to-digital converter, feedback pin, sensor input, or another circuit is attached, that input resistance sits in parallel with R2. The lower leg becomes smaller, so the output falls. This difference between no-load and loaded voltage is load sag.

Voltage divider design choices and their tradeoffs
Choice	Benefit	Tradeoff
Lower resistor values	Stiffer output against loading and leakage	More current and resistor power loss
Higher resistor values	Lower standing current	More sensitivity to input current, noise, leakage, and capacitance
Coarser preferred series	Fewer standard part values	Larger chance that the selected pair misses the exact target
Tighter tolerance	Narrower worst-case output span	Usually higher component cost

A divider is not a voltage regulator. Its output changes when the source changes, the load impedance changes, or resistor values drift. It is a poor direct supply for a variable-current load. A buffer, reference, regulator, or active amplifier is often the better choice when the connected circuit draws meaningful current or needs a stable voltage.

Real components introduce more than nominal resistance. Tolerance changes the ratio, power becomes heat, and preferred E-series values may move a solved resistor away from its mathematical value. Working-voltage rating, temperature coefficient, input leakage, ADC acquisition time, parasitic capacitance, noise, and PCB layout can matter even when the DC arithmetic looks correct.

Use the calculation to choose and audit a passive DC resistor pair. Then check the connected device's data sheet, select parts with suitable power and voltage ratings, simulate when dynamic behavior matters, and confirm the node on the bench.

How to Use This Tool:

Choose the unknown first, then describe the source, target, known resistor, and actual input resistance connected to the output node.

Select Analyze R1/R2 to evaluate an entered pair, or choose Solve R1 or Solve R2 to calculate one resistor from the target output.
Enter Input voltage and Target output with their units. The target must be greater than zero and lower than the input.
Enter the known resistor values. In solve mode, the resistor being solved is replaced by the calculated value; the other entered resistor remains the anchor.
Choose Connected load. Use no load only for a genuinely open output; otherwise enter the lowest expected input resistance for a conservative sag check.
Select exact, E12, E24, or E96 under Build values. Preferred-value selection applies to R1 and R2 after solving, so the final loaded output may differ from the target.
Add Resistor tolerance and Maximum rating utilization when choosing physical parts. A 50% utilization setting asks for a nominal rating at least twice the hottest modeled resistor dissipation.
If Solve R2 reports that the load is too low, raise the load impedance, reduce R1, lower the target, or add a buffer. No positive R2 can satisfy a target when the required lower-leg resistance is already at or above the connected load.
Review loaded output, target error, load sag, tolerance span, currents, and resistor power before carrying the selected pair into a schematic.

Interpreting Results:

Loaded output is the voltage to compare with the connected device's allowed range. No-load output shows the ideal pair without external loading, and their difference is Load sag. A small nominal target error can still be unacceptable when the tolerance span crosses an ADC limit, logic threshold, or reference requirement.

Check resistor power individually. The recommended rating is based on the hotter of R1 and R2 divided by the allowed utilization percentage; it is not a catalog part selection and does not check working voltage or ambient derating. The load's own power is reported separately.

Preferred values are a buildability aid. Verify that the displayed selected R1 and R2, not only the exact solved pair, meet the target under the minimum load impedance and worst expected source voltage.

Technical Details:

A connected load shares the path from output to ground with R2. Replacing those two parallel resistances with one effective lower leg reduces the loaded divider to the ordinary two-resistor equation.

Formula Core:

The governing equations use volts, ohms, amperes, and watts after all displayed units are normalized.

R_{e} = \frac{R_{2} R_{L}}{R_{2} + R_{L}}

V_{out} = V_{in} \frac{R_{e}}{R_{1} + R_{e}}

R_{1} = R_{e} (\frac{V_{in}}{V_{target}} - 1)

P = I^{2} R = \frac{V^{2}}{R}

Voltage divider formula quantities
Quantity	Meaning	Unit
`R1`	Top resistor from input to output	Ω
`R2`	Bottom resistor from output to ground	Ω
`RL`	Connected load resistance; zero in the input model means no external load	Ω
`Re`	Effective lower resistance, R2 in parallel with RL	Ω
`Vin`, `Vout`	Source and loaded output voltage	V

To solve R2 under load, the required effective lower leg is R1 × Vtarget ÷ (Vin − Vtarget). When a load exists, R2 is Re × RL ÷ (RL − Re). A positive solution exists only when Re is smaller than RL. With no external load, Re equals R2.

Source current is (Vin − Vout) ÷ R1. R2 and load currents are Vout divided by their respective resistances. Thevenin resistance is R1 in parallel with R2; it describes the divider's output impedance before the external load is attached.

Tolerance limits use the worst ratio directions. The low output case increases R1 and decreases R2 by the selected tolerance; the high case decreases R1 and increases R2. The external load is held fixed. Target error uses the selected build values and the loaded output, with percentage error measured relative to the target.

Transformation Core:

Exact mode keeps the entered or solved resistances. E12, E24, and E96 modes search the selected preferred-number family across nearby decades and choose the value with the smallest relative error for each resistor independently. The complete divider calculation then runs again with those selected values.

Voltage divider calculation path
Stage	Result
Normalize	Convert mV to V and kΩ or MΩ to Ω without changing the physical quantity
Solve	Keep the entered pair or derive the missing R1 or R2 from the loaded target
Select	Keep exact values or choose nearest E-series values
Audit	Recalculate loaded/no-load voltage, error, sag, current, power, tolerance span, and rating

Accuracy Notes:

The equations describe a static, linear, resistive DC network. They do not model source impedance, device input current, ADC sample-and-hold settling, capacitance, frequency response, noise, temperature drift, resistor voltage coefficient, or PCB leakage.

Use the connected device's minimum input resistance when it varies.
Check source-voltage tolerance separately because the output scales directly with Vin.
Confirm resistor working voltage, package power derating, and transient conditions from component data sheets.
Use a buffer or regulated reference when the load is variable or accuracy depends on dynamic behavior.

Worked Examples:

A load halves the lower leg

With 10 V input, a 10 kΩ R2, and a 10 kΩ load, the effective lower leg is 5 kΩ. Solving R1 for a 2.5 V target gives 15 kΩ. The loaded output is 2.5 V, but disconnecting the load raises the same pair's output to 4 V, so the reported sag is 1.5 V. That gap is the reason the load impedance belongs in the design calculation.

References:

IEC 60063:2015 Preferred number series for resistors and capacitors, International Electrotechnical Commission, 27 March 2015.
Voltage Dividers in Power Supplies, Analog Devices, 1 August 2018.