Op-Amp Gain Calculator

Feedback topology:

The signal equation, visible inputs, and noise gain follow this choice.

Design preset:

Presets include optional speed and loading assumptions; Custom preserves your current values.

Calculation goal:

Solved values remain ideal; select an available resistor and re-run in Analyze mode for a build check.

Analyze Solve Rf Solve Rin

Target signal gain magnitude:

The selected topology supplies the sign and phase.

V/V

Feedback resistor Rf:

Enter the resistor value used in the feedback ratio.

{{ inputResistorLabel }}:

{{ primaryInputLabel }}:

Voltage is interpreted relative to the reference node.

{{ secondInputLabel }}:

Second input resistor R2:

The first-channel target does not resize this resistor.

Reference voltage:

The ideal signal equation and output swing are centered on this node.

Supply rails:

Enter the positive and negative supply limits in volts.

PositiveV

NegativeV

Gain-bandwidth product:

Optional typical data-sheet value; zero keeps the base gain result unchanged.

Highest sine frequency:

Zero omits frequency-dependent warnings.

Available slew rate:

Optional speed check; zero is neutral.

V/us

Resistor tolerance:

This does not model temperature coefficient or resistor matching correlation.

Output headroom per rail:

Zero uses the entered supply rails directly.

Output load:

The ideal gain model does not include output impedance or current limiting.

Display precision:

Choose compact or detailed presentation.

Metric	Value	Engineering note	Copy
{{ row.label }}	{{ row.value }}	{{ row.note }}

Negative feedback lets an operational amplifier trade its very large open-loop gain for a predictable relationship between input voltage and output voltage. The resistor network sets that closed-loop relationship, but a correct resistor ratio does not guarantee that a real device can produce the requested signal.

The four common feedback arrangements answer different circuit questions. Non-inverting stages preserve polarity and present a high input impedance. Inverting stages reverse polarity and let the input resistor help define input impedance. Differential stages amplify a voltage difference when their resistor ratios are properly matched, while inverting summers combine more than one input through separate resistors.

Comparison of op amp feedback topologies
Topology	Signal relationship	Practical caution
Non-inverting	Positive gain of 1 + Rf/Rg	A resistor-only solve cannot produce gain at or below 1.
Inverting	Negative gain of -Rf/Rin	The source sees Rin in the ideal model.
Differential	Amplifies V+ minus V-	Common-mode rejection depends on matched resistor ratios.
Inverting summer	Adds weighted negative contributions	Each channel has its own input resistor and gain.

Supply rails, output headroom, gain-bandwidth product, slew rate, load current, resistor tolerance, input common-mode range, and stability all limit real performance. A gain estimate is therefore a design check, not a substitute for the selected op amp's data sheet, circuit simulation, and bench measurement.

How to Use This Tool:

Choose the feedback topology first because it changes the signal equation, visible inputs, and meaning of noise gain.

Select Analyze to evaluate entered resistors, or choose Solve Rf or Solve Rin to size one resistor from a target gain magnitude.
Enter resistor values and signal voltages with their units. For differential and summing stages, also enter the second signal and its resistor where shown.
Set the Reference voltage to ground for a ground-referenced split supply or to the intended bias point for a single-supply stage, then enter the positive and negative rails.
Open Advanced when speed, tolerance, headroom, or loading matters. A zero value deliberately omits the corresponding optional comparison.
Check Gain ledger for the calculated values and Design review for swing, bandwidth, slew-rate, and model-limit warnings. After solving a resistor, choose an available part and run Analyze again.

Interpreting Results:

Signal gain includes polarity. A negative value means inversion, while Noise gain is always positive and controls the first-order bandwidth estimate. Do not use signal-gain magnitude in place of noise gain for inverting or summing stages.

If Output says rail limited, the ideal output lies beyond the entered linear window and the reported limited output is clipped to that window. A positive margin only proves compliance with the entered rails and headroom; it does not check the device's input common-mode range or load-dependent output swing.

Compare estimated bandwidth with the highest signal frequency. A tenfold margin is a useful first review cue here, not a universal stability guarantee.
Compare required sine-wave slew rate with the data-sheet value at the relevant supply, load, and temperature.
Use the transfer curve to see rail clipping, then verify the chosen device with its data sheet and simulation model.

Technical Details:

The ideal model assumes negative feedback keeps the two input terminals at nearly the same voltage while drawing no input current. All resistance values are converted to ohms, voltages to volts, and frequencies to hertz before calculation. The reference voltage is carried through every topology rather than being assumed to be zero.

Formula Core:

The selected topology determines the ideal output. Solved resistor values use the same feedback ratios, and the output is then limited to the rail window after subtracting the entered headroom from each rail.

\begin{array}{rcl} V_{out,NI} & = & V_{ref} + (1 + \frac{R_{f}}{R_{g}}) \times (V_{in} - V_{ref}) \\ V_{out,I} & = & V_{ref} - \frac{R_{f}}{R_{in}} \times (V_{in} - V_{ref}) \\ V_{out,D} & = & V_{ref} + \frac{R_{f}}{R_{in}} \times (V_{+} - V_{-}) \\ V_{out,S} & = & V_{ref} - R_{f} \times (\frac{V_{1} - V_{ref}}{R_{1}} + \frac{V_{2} - V_{ref}}{R_{2}}) \end{array}

Speed and loading checks use noise gain, output amplitude relative to the reference node, and the limited output voltage.

\begin{array}{rcl} f_{BW} & = & \frac{GBW}{A_{noise}} \\ {SR}_{required} & = & \frac{2 \times π \times f \times |V_{ideal} - V_{ref}|}{10^{6}} \\ I_{load} & = & \frac{|V_{limited} - V_{ref}|}{R_{load}} \\ ε_{ratio} & = & (\frac{1 + t}{1 - t} - 1) \times 100 % \end{array}

For a summing stage, noise gain is 1 + Rf/R1 + Rf/R2. For the other three topologies it is 1 + Rf/Rin. In the tolerance equation, t is the entered resistor tolerance as a decimal. Inverting, differential, and summing gain use the full ratio error; non-inverting gain scales it by (Rf/Rg) divided by signal gain. This is a resistor-ratio bound, not a full error budget.

Accuracy Notes:

This is an ideal resistive voltage-feedback model. It does not calculate input bias or offset error, resistor noise, input common-mode violations, output swing versus load, capacitive-load stability, phase margin, distortion, temperature drift, or package and layout effects. Gain-bandwidth division is a first-order dominant-pole estimate and may not describe decompensated, current-feedback, or multi-pole devices.

Worked Examples:

Non-inverting sensor stage

With Rf at 10 kohm, Rg at 2 kohm, a 250 mV input, a 0 V reference, and ±5 V rails, the ideal gain is +6 V/V and the ideal output is 1.5 V. The output remains inside the entered rail window. If headroom, gain-bandwidth product, slew rate, or load are later added, those checks may still disqualify an op amp even though the resistor ratio is correct.

References:

Noninverting Amplifier Circuit, Texas Instruments, revised January 2019.
Ramping Up on Slew Rate, Texas Instruments, revised September 2022.
Understanding Operational Amplifier Specifications, Texas Instruments, revised July 2021.